Difference between wire, reg, and Integer in Verilog

Featurewirereginteger
TypeNet typeVariable type Variable type
AssignmentContinousProceduralProcedural only
StorageNo StorageStores valueStores vlaue
UsageConnect modules/combinational logicSequential & Combinational logicLoop counter
Data Widthcan be vectorcan be vectorFixed 32 bit
Synthesizableyesyesnot used for Hardware


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